High voltage low-power photovoltaic sources have a variety of applications including solar chargers, wireless sensors and detectors, different portable consumer products, self-powered light detectors, energy sources for driving MEMS engines, etc. Many of the state of the art integrated circuits (ICs) are capable of operating at microwatt power consumption levels that can be obtained from photovoltaic cells fabricated on the same silicon chip as the IC. Such photovoltaic HV sources can also be used for continuous charging of batteries in power management systems to prevent total discharge and enabling energy savings. If the output of the photoelectric source is high enough, it can be connected to a battery or energy storage capacitor (supercapacitor) to allow higher current peak values. The resulting energy harvesting system strongly increases the application field covering long-range RFID systems, smart dust products, etc.
There are two conventional approaches in integrating photovoltaic sources into the silicon IC.
The first conventional approach is to use conventional low-voltage (single p-n junction) photovoltaic elements and dc-dc boost converters capable of increasing the low-level input voltages to the levels of the IC system voltage (Vdd). This approach is utilized, for example, in products such as LTC 3108 produced by Linear Technology Corporation of Milpitas, Calif., USA. This approach requires a complicated analog circuit, and faces many challenges related to the need to process very low signals and distinguish them from stray voltages.
The second conventional approach is to connect the individual solar cells (p-n junction) in series on silicon (not the external connection of silicon dice). Some companies (e.g., Clare, an IXYS Company, of Beverly, Mass., USA) fabricate specialized chips that generate voltages up to several volts by connecting individual solar cells on the chip (e.g., Clare's CPC1822-CPC1832 products).
In most cases, in order to obtain high voltages, solar cells are fabricated at the isolated areas of silicon and then connected in series or series-and-parallel combinations.
A standard photovoltaic p-n diode cell typically generates from 0.4 to 0.7 V under illumination by the sunlight. The connection of photovoltaic elements can be, of course, external, if the solar cells are on separate silicon substrates (separate wafers). This is what can be found in most commercial solar energetics systems. It is clear that external connections strongly increase the system cost and decrease reliability. In case of working with light concentrators, the problem of connections becomes a bottleneck since the currents from individual solar wafers reach tens and hundreds of Amperes. HV cells solve the problem by decreasing the current for the same light power per unit square of the solar array surface.
Several solutions have been proposed to make HV solar cells on one silicon substrate.
A high voltage multi-junction solar cell is disclosed in U.S. Pat. No. 4,341,918 (Evans, et. al), where a plurality of discrete voltage generating regions or unit cells are formed in a single generally planar semiconductor body. The unit cells comprise doped regions of opposite conductivity type separated by a gap or undiffused region. Metal contacts connect adjacent cells together in series so that the output voltages of the individual cells are additive. A problem with this approach is that special metallization is needed by forming a pattern of parallel bars of aluminum paste that is screen-printed on the surface and fired to assure penetration of the aluminum through the diffused N+ region on this face and to make connection to P+ regions. Another problem is that the output voltage is limited since the common P-type base shunts the serially connected individual N+P (base) junctions.
Attempts to isolate the elements comprising the high-voltage where SOI isolation was employed are disclosed, for example, in U.S. Pat. No. 6,281,428 (Chiu et. al). Chiu teaches using the oxide layer of the SOI wafer as the isolating layer. The approach makes use of serially connected transverse photovoltaic cells formed by diffusions using special masks (six masks together with a special mask forming a mesa structure on the peripheral region to isolate the light-sensitive array). The photosensitive diodes are connected in series by metal plugs. Light enters the photosensitive array through dielectric layers.
The limitation of the approach taught by Chiu is the large number of additional masks specially added to the SOI core process in case of thin silicon on insulator layers. Also, for the mentioned thick Si substrates it is difficult to reach the bottom oxide-BOX (32) interface with the P+ diffusion, making the proposed P+-p device structure problematic.
What is needed is a photovoltaic device that addresses the problems listed above and can be produced using a standard process flow (or with minimal additional masks).